Data Dependent Circuit for Subgraph Isomorphism Problem

The subgraph isomorphism problem has various important applications, although it is generally NP-complete and difficult to solve. This paper examines the feasibility of a data dependent circuit for the subgraph isomorphism problem, which is particularly suitable for FPGA implementation. For graphs of 32 vertices, the average logic scale of data dependent circuits is only 5% of the corresponding data independent circuit. The circuit is estimated to be 460 times faster than the software for 32 vertices. Even if the circuit generation time is included, a data dependent circuit is expected to be two times faster than software when there are 32 vertices. For larger graphs, the performance gain would be far larger. 1 Subgraph Isomorphism Problem The subgraph isomorphism problem is a simple decision problem. Given two graphs Gα and Gβ , it is determined whether Gα is isomorphic to any subgraph of Gβ . For example, see Figure 1. In this figure, Gβ has a subgraph that is isomorphic to Gα, while Gγ does not. The subgraph isomorphism problem has many applications, including scene analysis in computer vision and search operation in chemical structural formula database. However, the subgraph isomorphism problem is generally NP-complete [1] and computationally difficult to solve. To solve the subgraph isomorphism problem practically, several algorithms have been proposed. Ullmann [2] proposed a depth first search algorithm with a